The chips also feature a "turbo mode" design that dynamically switches multi-cores into a "higher gear" for better performance without generating extra heat, and also allows throttling-down of unused cores to reduce power consumption when processing demands are lower. From 2009 every Intel processor will be using the Nehalem architecture, with server products being the first Nehalem chips, followed by "Havendale" and "Lynnfield" desktop chips and then "Auburndale" and "Clarksfield" mobile versions later. [Reuters, Intel and NZHerald]

It's for the second generation of their upcoming Nehalem based processors (specifically Clarksfield and Auburndale), and it'll drop Intel's current northbridge and southbridge chipset arrangement—stuff like the memory controller will be integrated with the CPU (AMD style) for more bandwidth and lower latency, while a single integrated chipset codenamed Ibex Peak-M picks up the rest of the slack.

Wireless will be pretty similar to Montevina, with two wireless module options—Pumka Peak will have 802.11 a/b/g/n while Kilmer Peak will roll with WiMax. [Digitimes via Inquirer

The platform will scale from two to eight cores, and eventually from "notebooks to servers." That's the scalable part, so you'll see it everywhere. Simultaneous Multi-Threading will let each core run two threads at once, plus it quadruples the memory-bandwidth of the current top-o'-the-line Xeons. It's also got an 8MB level-3 cache, Quickpath interconnects (up to 25.6GB per second), integrated memory controller (AMD what?) and supports up to DDR3-1333 memory, plus a bunch of other hardcore geek stuff, which you can scope out at Intel. [Intel]

The Dunnington is for the server line, as a successor for the Xeon Tigerton, and will be "Intel's first Core 2 Duo processor with three dual-core banks." The Nehalem should be of more interest to most of our readers, as it's the Intel Penryn successor (consumer line), and will have on-die memory controllers for "the first time in 18 years," along with tri-channel DDR3 memory. This means it'll be quite a bit faster than what you're currently running in terms of memory bandwidth. [Daily Tech]

The six-core beast will be succeeded by the even meatier, Nehalem micro-architecture, which will support greater than eight cores. The work regarding the Dunnington project is still under wraps, but our friends at EDJ insist Intel has already put together a die, the size of a postage stamp, with three dual-core 45nm Penryn chips on it sharing a 16MB L3 cache. Allegedly, we'll see the Dunnington in either Q2 or Q3, this year—we'll be sure to keep you posted on any developments. [EDJ via The Inquirer]