Stacked-up chip technology isn't new, but scientists at the University of Rochester have built the first properly-3D chip recently. Unlike previous attempts, with layered standard 2D chip-circuitry on top of similar layers, the new chip actually has components built into a 3D-matrix, with interconnects between layers.The neatest bit (and most difficult to design) is that specific segments of the processor are arranged for optimum performance: timing delays and synchronization issues are thus minimized. Apparently it's the first 3D synchronization circuitry chip, and it's running at 1.4GHz. It's one possible future for chip tech (should we rename them "cubes"?) As the team leader puts it, horizontal fabbing tech is getting closer to its size limits, but "we're going to start scaling vertically, and that will never end." [HotHardware]
This is an evolution of work done before. Groups have previously stacked the processor cache on top of the ALU and a lot of other teams are working on very similar developments. There's also a fair bit of work on developing the CAD tools needed to work in 3D. One of the key requirements from the tools is effective thermal design to prevent over-heating.